1. Field of the Invention
The present invention relates to a plasma display and its driving method and circuit.
2. Description of the Related Art
A plasma display includes a Plasma Display Panel (PDP) that uses a plasma generated by a gas discharge to display characters or images. Such a PDP includes, according to its size, more than several tens to millions of pixels (discharge cells) arranged in the form of a matrix.
The plasma display is driven by a plurality of subfields, which are divided from a frame and have respective weight values. In addition, each subfield has a reset period, an address period, and a sustain period. The reset period is for initializing the discharge cells so that the next addressing can be stably performed. The address period is for selecting turn-on/turn-off discharge cells (i.e., cells to be turned on or off). In addition, the sustain period is for causing a sustain discharge for displaying an image on the addressed discharged cells.
In order to perform such operations, a sustain pulse alternately having a high-level voltage (voltage Vs) and a low-level voltage (0V) is supplied in inverse phases to the scan and sustain electrodes during the sustain period, and reset and scan waveforms are supplied to the scan electrodes during the reset and address periods. Therefore, a scan driving board for driving the scan electrodes and a sustain driving board for driving the sustain electrodes are separately needed, and in this case, a problem of mounting the driving boards on a chassis base can occur, and the cost increases because of the separate driving boards.
Therefore, for combining the two driving boards into a single combined board, schemes of providing the single board to an end of the scan electrodes and extending an end of the sustain electrodes to reach the combined board have been proposed. However, when the two driving boards are combined as such, the impedance at the extended sustain electrodes is increased.
In order to solve such a problem, Korean Laid-Open Patent Publication No. 2003-90370 discusses a sustain pulse alternately having voltages Vs and −Vs being supplied only to the scan electrode while the sustain electrode is biased at a ground voltage during the sustain period.
However, since a capacitive component Cp is formed by the scan and sustain electrodes, a power loss of ½ Cp 2Vs2 is generated when a voltage of the scan electrode is changed from the voltage −Vs (or Vs) to the voltage Vs (or −Vs). The power loss becomes {1/2Cp(Vs)2+1/2Cp(Vs)2} when the voltage Vs is supplied alternately to the scan and sustain electrodes. Therefore, when the voltages Vs and −Vs are alternately supplied to the scan electrode during the sustain period, the power loss can be doubled in comparison to the case in which the voltage Vs is supplied alternately to the scan and sustain electrodes.